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System Architecture :: CISC and RISC processor architecture.

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The basic differences between CISC-and RISC-architecture are covered in various quantity and levels of complexity of processor commands. In classical realizations of architecture CISC (Complete Instruction Set Computer) it is a lot of machine commands, and they semantic are loaded, is similar to operators hi-level programming languages. RISC (Reduced Instruction Set Computer) - architecture of system with the reduced set of commands. For effective performance demands rather scrupulous optimization of a primary program code.

Classical architecture of high-efficiency servers the architecture of a computer with the reduced set of commands - RISC is considered. Rudiments of this architecture leave the roots to computers CDC6600, which developers (Tornton, Cray) have realized importance of simplification of a set of commands for construction of fast computers. This tradition of simplification of architecture Cray with success has applied at creation of widely known series of supercomputers of company Cray Research. However concept RISC of its modern understanding is final was generated on the basis of three research projects of computers: the processor of 801 companies IBM, processor RISC of university of Berkeley and processor MIPS Stenfordskogo of university.

Among other features of RISC-architecture it is necessary to note presence enough the big register file (in typical RISC-processors are realized 32 or greater number of registers in comparison with 8 - 16 registers in CISC-architecture) that allows greater volume given to be stored in registers on a processor crystal greater time and simplifies work of the compiler on distribution of registers under variables.

Development of architecture RISC was substantially defined by progress in the field of creation of optimizing compilers. The modern technics of compilation allows to use effectively advantages of a greater register file, the conveyor organization and greater speed of performance of commands. Modern compilers use also advantages another optimized technics for increase of the productivity usually applied in Processors RISC: realization of the detained transitions and superscalar processing, Allowing during the same moment of time to give out on performance a little Commands.

Let's consider 2 groups of modern RISC-processors. The first concern basically to server architecture:

  • Digital Alpha
  • HP PA-RISC
  • IBM Motorola PowerPC
  • Silicon Graphics MIPS
  • Sun MicroSystems SPARC

The second group represents RISC-processors for built in applications:

  • Advanced RISC Machines ARM
  • Advanced RISC Machines Thumb
  • Hitachi SuperH
  • Mitsubishi M32R
  • Silicon Graphics MIPS16

Anyway, now RISC-architecture in absolute minority. And the companies which had initially a reputation for adherents of the RISC-concept, have anyhow declared, that are going to do the rate on new ideas, differently - on post-RISC-processors. It is a question first of all of companies Sun and HP though and announced new RISC-processors for servers, but to speak about any qualitative progress of these architecture it is not necessary. The matter is that new processors will not only use the chassis of the previous server decisions and as consequence, can be established in them as upgrade-blocks, but also to the full will keep all the previous operating time, behind the minimal number of innovations.